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| [ak4185] ak4185 low power touch screen controller with spi? interface general description the ak4185 is a 4-wire/ 5-wire resistive touch screen controller that incorporates 12bit sar a/d converter. the ak4185 operates do wn to 1.6v supply voltage in order to connect a low voltage microprocessor. the ak4185 has bot h an automatic conti nuous measurement and a measurement data calculation function. the f unctions that normally require external processing, such as calculating the average screen input value, are pr ocessed by the ak4185. in additi on, a new sequentia l mode achieves short coordinate measurement time while greatly reducing the microprocesso r overhead. the ak4185 can detect the pressed screen location by performing two a/d conversions and it can also measure touch pressure. the ak4185 is the best fit for cellular p hone, dsc, dvc, smart phon e, or other portable devices. features ? 4-wire or 5-wire touch screen interface ? spi tm serial interface ? 12bit sar a/d converter with s/h circuit ? sampling rate: 300ksps ? pen pressure measurement (4-wire) ? continuous read function (external clock mode) ? integrated internal osc (sequence mode) ? integrated median averaging filter ? low voltage operation: vdd = 1.6v ~ 3.6v ? penirqn buffer output ? low power consumption: 240 a at 1.8v ? auto power down ? package: 12pin csp (1.96mm x 1.46mm, pitch 0.5mm) ? software compatible with ak4182a penirqn spi serial i/f & control logic csn vss ain+ ain- dout din sclk xp/br yp/tr xn/tl yn/bl in/ wiper sar adc vdd 4/5wire to u c h screen drivers interface mux temp vref+ vref- internal osc figure 1. block diagram spi tm is a registered tradem ark of motorola, inc. ms0954-e-05 2010/10 - 1 -
[ak4185] ordering guide ak4185ecb ? 40 +85 c 12pin csp (1.96mm x 1.46mm, 0.5mm pitch) black type AKD4185 ak4185 evaluation board pin layout a bcd 3 1 2 top view 3 xp/br yp/tr xn/tl yn/bl 2 vdd csn din vss 1 in/wiper penirqn dout sclk a b c d top view ms0954-e-05 2010/10 - 2 - [ak4185] pin/function no. pin name i/o function c2 din i serial data input data is clocked on the rising edge of sclk. must keep ?l? while not issuing command. b2 csn i chip select input enables writing data to registers when csn = ?l?. d1 sclk i serial clock input a2 vdd - power supply and external reference input: 1.6v ~ 3.6v xp i/o touch panel x+ input (4-wire, panel bit = ?0?) a3 br i/o touch panel bottom right in put (5-wire, panel bit = ?1?) yp i/o touch panel y+ input (4-wire, panel bit = ?0?) b3 tr i/o touch panel top right input (5-wire, panel bit = ?1?) xn i/o touch panel x- input (4-wire, panel bit = ?0?) c3 tl i/o touch panel top left input (5-wire, panel bit = ?1?) yn i/o touch panel y- input (4-wire, panel bit = ?0?) d3 bl i/o touch panel bottom right in put (5-wire, panel bit = ?1?) d2 vss - ground in i auxiliary analog input (4-wire, panel bit = ?0?) a1 wiper i top touch panel input (5-wire, panel bit = ?1?) b1 penirqn o pen interrupt output (cmos output) the penirqn pin is ?l? when touch-screen press is detected and csn = ?h?. this pin is always ?h? irrespective of touch-screen press when pen interrupt is not enabled. c1 dout o serial a/d data output data is clocked at sclk falling edge. this pin is hi-z when csn keeps ?h?. note 1. all digital input pins (din, csn, sclk) must not be left floating. ms0954-e-05 2010/10 - 3 - [ak4185] handling of unused pin the unused i/o pin must be processed appropriately as below. classification pin name setting analog in/wiper this pin must be open. absolute maximum ratings (vss = 0v ( note 2 )) parameter symbol min max units power supply vdd -0.3 4.6 v input current, any pins except for supply iin - 10 ma touch panel drive current ioutdrv - 50 ma input voltage ( note 3 ) vin ? 0.3 vdd+0.3 or 4.6 v ambient temperature (power applied) ta -40 85 c storage temperature tstg -65 150 c note 2. all voltages with respect to ground. note 3. xp/br, xn/tl, yp/tr, yn/ tl, in/wiper, csn, din and sclk pins. the maximum value is smaller value between (vdd+0.3)v and 4.6v. warning: operation at or beyond these limits may result in permanent damage to the device. normal operation is not guaranteed at these extremes. recommend operating conditions (vss = 0v ( note 2 )) parameter symbol min typ max units power supply vdd 1.6 1.8 3.6 v note 2. all voltages with respect to ground. warning: akm assumes no responsibility for the usage beyond the conditions in this datasheet. ms0954-e-05 2010/10 - 4 - [ak4185] analog characteristics (ta = -40 c to 85 c, vdd = 1.8v, fsclk = fs x 16=5.0mhz, 12bit mode) parameter min typ max units a/d converter resolution - 12 bits no missing codes 11 12 bits integral nonlinearity (inl) error - - 2 lsb differential nonlinearity (dnl) error -2 1 +3 lsb offset error - - 6 lsb gain error - - 4 lsb touch panel drivers switch on-resistance xp, yp (r l =300 ? ) xn, yn (r l =300 ? ) 2.5 2.5 5 5 15 15 ? ? penirq pull up resistor r irq 30 50 70 k? auxiliary in input input voltage range 0 vdd v temperature measurement temperature range -40 85 c resolution ( note 4 ) - 1.2 - c accuracy ( note 5 ) - 3 - c power supply current normal mode (internal oscillator mode) ( note 6 ) vdd=18v vdd=3.6v - - 240 - - 550 a a normal mode (bus clock mode) pd0 = ?0? ( note 7 ) vdd=1.8v vdd=3.6v - - 340 - - 800 a a full power down (when writing control command with pd0 = ?0?) - 0 3 a note 4. ?ideal? value derived from a theory when vdd = 1.8v. this value according to the supplied vdd voltage is 0.6466 x vdd. note 5. the typical valu e has +6c(typ) offset. note 6. the signal of 1khz, 1.6vpp (-1db) is input to the in/wiper pin, when count bit = ?0?, interval = 0s and command cycle is 50s. dout c l = 0pf, the current of touch panel drivers is excluded. note 7. the signal of 1khz, 1.6vpp (-1db) is input to the in/wiper pin, when single mode for external clock (continue bit = ?0?) and 15 sclk clock cycles. dout c l = 0pf, the current of touch panel drivers is excluded. dc characteristtics (logic i/o) (ta=-40 c to 85 c, vdd =1.6v to 3.6v) parameter symbol min typ max units digital input (csn, sclk, din) ?h? level input voltage vih 0.8xvdd - - v ?l? level input voltage vil - - 0.2xvdd v input leakage current. iilk -10 10 a digital output (dout, penirqn) ?h? level output voltage (@ iout = -250 a) voh vdd-0.4 - - v ?l? level output voltage (@ iout = 250 a) vol - - 0.4 v tri-state leakage current all pins except for xp, yp, xn, yn pins xp, yp, xn, yn pins iolk -3 -3 - - 3 3 a a ms0954-e-05 2010/10 - 5 - [ak4185] switching characteristics (ta=-40 c to 85 c, vdd=1.6v to 3.6v, cl=50pf) parameter symbol min typ max units internal oscillator clock frequency f osc 2.5 3.6 5.1 mhz touch panel (a/d converter) throughput rate fs - 300 - khz sclk frequency duty f sclk duty 30 40 - 50 5000 60 khz % sampling time (rin = 600 ? ) ( note 8 ) ttrk 0.6 - - s conversion time tconv - - 12 1/fsclk csn edge to first sclk ? ? tcss 50 - - ns csn edge to dout tri-state disabled tdcd - - 50 ns sclk high pulse width tckh 80 - - ns sclk low pulse width tckl 80 - - ns data setup time tds 40 - - ns data valid to sclk hold time tdh 40 - - ns data output delay after sclk ? ? tdod - - 70 ns csn ? ? to sclk ignored tcsi 50 - - ns csn ? ? to dout hi-z state tccz - - 90 ns csn hold time tcsw 150 - - ns note 8. the actual tracking periods are 3tsclk. (tsclk = 1/f sclk ) csn s clk din tcss tckh tckl tds tdh tdod tcsi pd0 50% % % figure 2. timing diagram ms0954-e-05 2010/10 - 6 - [ak4185] operation overview function overview the ak4185 consists of the following blocks: 1.6v successive approximation resister (sar) a/d converter 4-wire or 5-wire resistive touch screen controller interface single or continuous a/d conversion integrated median averaging filter sar a/d converter conversion clock select function - external clock (sclk) - internal clock spi tm i/f a/d converter for touch screen the ak4185 incorporates a 12bit successive approximation resistor (sar) a/d converter for position measurement, temperature, and auxiliary input. the architecture is base d on capacitive redistribution algorithm, and an internal capacitor array functions as the sample/hold (s/h) circuit. the sar a/d converter output is a straight binary format as shown below: input voltage output code fffh ( ' vref-1.5lsb)~ ' vref ffeh ( ' vref-2.5lsb) ~ ( ' vref-1.5lsb) --------- --------- 0.5lsb ~ 1.5lsb 001h 0 ~ 0.5lsb 000h ' vref: (vref+) ? (vref-) table 1. output code the ak4185 can select sclk of the digital interface and inte rnal clock within oscillator for a/d conversion clock. the full scale ( ' vref) of the a/d converter depends on the input mode. position and pen pressure is actually measured by differential mode, then in and temperature is actually measured by single-ended mode. the ak4185 is controlled by the 8bit serial command on the din pin. a/d conversion result is 12bit data output on the dout pin. analog inputs analog input is selected via the a2, a1, and a0 bits in the converter register. if the analog inputs are selected to the x, y, or z-axis, at differential mode, the full scale ( ' vref) is the voltage difference between the non-inverting terminal and the inverting terminal of the measured axis (e.g. x-axis measurement: (xp) - (xn)). analog non-inverting input to a/d converter is the non-inverting terminal of the non-measured axis while the inverting input is the inverting terminal of the measured axis. at single-ended mode, the full scale of a/d converter ( ' vref) is the external reference voltage (vdd). the analog input of a/d converter ( ' ain) is the voltage differ ence between the selected channel (in, temp) and the vss. in case of external clock mode, tracking time is the pe riod from the falling edge of 5th sclk to that of 8th sclk after the detection of start bit during csn = ?l?. if the source impedance of analog input is larger than 600 ? , longer tracking time is requir ed. then a/d conversion should be started. ms0954-e-05 2010/10 - 7 - [ak4185] position detection of touch screen 1. the position detection for 4-wire touch screen the position on the touch screen is detected by taking the vo ltage of one axis when the voltage is supplied between the two terminals of another axis. at least two a/d conversions ar e needed to get the two-dimensions (x/y-axis) position. the x-plate and y-plate are connected on the dotted line when the panel is touched. x+ x- x-plate (top side) y-plate (bottom side) c) 4-wire touch screen construction x-plate y-plate x-plate y+ y- yn xn yp xn-driver sw on vref+ vref adc ain+ ain- xp xp-driver sw on a) x-position measurement differential mode b) y-position measurement differential mode yn xn yp yn-driver sw on vref+ vref- adc ain+ ain- xp yp-driver sw on vdd vdd touch screen y-p l ate figure 3. axis measurements for 4-wire touch screen ms0954-e-05 2010/10 - 8 - [ak4185] 2. the position detection for 5-wire touch screen a 5-wire touch panel consists of one transparent resistiv e layer and a top metal contact area separated by insulating spacers. the top layer acts only as a voltage measuring probe, the position detection uses th e bottom resistive layer that had metal contacts at the 4 corners. when the top layer is pre ssed by a pen or stylus, the top layer contacts with the bottom layer. then the x and y coordinates is detected. the 5-wire touch screen works properly even with damages or scratches on the top layer, therefore the 5-wire touch panel has higher durability than the 4-wire touch panel. connect the metal contact of the top layer to the wiper pin, which connected inside of the ak4185, to ain+ to measure the y-axis of current position. the top right and top left contacts at the 4 corners are connected to vdd and the bottom right and bottom left contacts connected to vss. then the ak4185 initiates a/ d conversion of ain+ input voltage, and y-axis position is determined. terminal tl tr bl br x-axis vss vdd vss vdd y-axis vdd vdd vss vss sw switch vdd/vss vdd on/off vss on/off switch vdd/vss table 2. driver sw configuration tl sw on bl sw on bl adc vdd bl tr wiper vref+ vref adc ain+ ain- tr a) x-position measurement differential mode tl bl sw on br sw on br tr sw on vdd br sw on br tr sw on b) y-position measurement differential mode vref+ vref- ain+ ain- vdd tl vdd wiper tl sw on the top layer and bottom layer are connected on the dotted line when the panel is touched. tl bl detection side (top layer) drive side (bottom layer) 5-wire touch screen construction tr br adc wiper figure 4. axis measurements for 5-wire touch screen ms0954-e-05 2010/10 - 9 - [ak4185] pen pressure measurement (only 4-wire touch screen) the touch screen pen pressure can be derived from the m easurement of the contact resi stor between two plates. the contact resistance depends on the size of the depressed area an d the pressure. the area of the spot is proportional to the contact resistance. this resistance (rtouch) can be calculated using two different methods. the first method is that when the total resistance of the x-plate sheet is already known. the resistance, rtouch, is calculated fr om the results of three conversions, x-position, z1-position, and z2-position, and then using following formula: ? ? ? ? ? ? ? ? ? ?= 1 z z 4096 x rr 1 2 position plate-x touch the second method is that when both the resistances of th e x-plate and y-plate are known. the resistance, rtouch, is calculated from the results of three conversions, x-position, y-position, and z1-position, and then using the following formula: ? ? ? ? ? ? ?? ? ? ? ? ? ? ? ? ? ? = 4096 y -1r1 z 4096 4096 xr r position plate-y 1 position plate-x touch on yn vref+ vref- adc ain+ ain- xp yp xn on a) z1-position measurement differential mode touch on yn vref+ vref- adc ain+ ain- xp yp xn on b) z2-position measurement differential mode touch vdd vdd figure 5. pen pressure measurements ms0954-e-05 2010/10 - 10 - [ak4185] temperature measurement equation <1> describes the forward characteristics of the diode. ( ) t d v v 0d eii ?= >< = 1 ) q kt v( t i 0 : reverse saturation current q: 1.602189 10 -19 (electron charge) k: 1.38054 10 -23 (boltzmann?s constant) v d : voltage across diode t: absolute temperature k the diode characteristic is approximately shown as a diode junction voltage. that is theoretically to the temperature; the ambient temperature can be predi cated by knowing this voltage. temp. sensor temp0 temp1 i 80 1 figure 6. temperature measurement as the ak4185 has two different fixed current circuits and a diode (temperature sensor), the temperature can be measured by using two different methods. the first method needs two conversions, but can derive the te mperature directly without know ing the voltage at a specific temperature. from equation <1> () () ? ? ? ? ? ? ? ? ? ? ? == ? ? ? ? ? ? ? ? ? ? ? ? = ? ? ? ? ? ? ? ? t v )80(v1v d0 d1 e80 80 i 1 i i i 273 )80(ink q vt be ]c[ ? ? = ? () ( ) 80v1vv be ?= 273v10648.2t be 3 ]c[ ??= the second method needs only one conversion as the following equation, but requires knowing the junction voltage at the specific temperature. >< ? ? ? ? ? ? ? ? ? ? ? ? ? ? = ? 2 in v q k t 0 i d i d ms0954-e-05 2010/10 - 11 - [ak4185] digital i/f the ak4185 operates with the microprocessor via spi tm bus. the microprocessor starts to transmit data synchronized with serial clock. the ak4185 operates off of supply voltage down to 1.6v in order to connect a low voltage microprocessor. micro- processor ak4185 sclk din dout vdd=1.6v ? 3.6v csn 4/5-wire touch panel penirqn figure 7. digital i/f 1. a/d data measurement (external clock mode) (1) single read (continue bit = ?0?) ddly bit = ?0? (lsb justified) command byte s csn sclk din 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 hi-z 12bit a/d data (1) (msb first) hi-z hi-z 8bit a/d data (1) (msb first) hi-z dout (ddly bit=0, mode bit =1) 22 23 24 dout (ddly bit=0, mode bit =0) ?l? figure 8. single read (external clock mode: ddly bit = ?0?) ddly bit = ?1? (msb justified) command byte s csn sclk din 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 hi-z 12b it a/ d data (1) (m sb fi rs t) hi-z hi-z 8bit a/d data (1) (msb first) hi-z dout (ddly bit=1, mode bit =1) dout (ddly bit=1, mode bit =0) ?l? figure 9. single read (external clock mode: ddly bit = ?1?) ms0954-e-05 2010/10 - 12 - [ak4185] (2) continuous read (continue bit = ?1?) ddly bit = ?0? (lsb justified) hi-z csn sclk din dout (ddly bit=0, mod e bit =0) 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 1 comman d byte s 12bit a/d data (1) (msb first) hi-z 12bit a/d data (2) (msb first) 12bit a/d data (6) (msb first) 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 hi-z 8bit a /d data (1) (msb first) hi-z 8bit a /d data (2) (m sb fi rs t) 8bit a /d data (6) (msb first) dout (ddly bit=0, mod e bit =1) 10 4 ?l? figure 10. continuous read (external clock mode: ddly bit = ?0?, count bit = ?0?) ddly bit = ?1? (msb justified) hi-z csn sclk din dout (ddly bit=1, mode bit =0) 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 1 command byte s 12bit a/d data (1) (msb first) hi-z 12bit a/ d data (2) (msb first) 12bit a/d data (6) (msb first) 22 23 2 4 25 26 27 28 29 30 31 32 33 3 4 35 36 37 hi-z 8bit a /d data (1) (msb first) hi-z 8bit a /d data (2) (m sb fi rs t) 8bit a /d data (6) (msb first) dout (ddly bit=1, mode bit =1) 101 ?l? figure 11. continuous read (external clock mode: ddly bit = ?1?, count bit = ?0?) 2. a/d data measurement (internal clock mode) (1) sequential mode start command s csn sclk din 1 2 3 4 5 6 7 8 0 1 0 1 1 1 r/w=?0? d7 d0 command byte figure 12. sequence mode start command (2) a/d data read for sequential mode hi-z csn sclk din dout (ddly bit=0) 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 8 19 20 21 1 12bit a/d data (x) (msb first) hi-z 12bit a/d data (y) (msb first) 12bit a/d data (z2) (msb first) 22 23 24 2 5 26 27 28 29 3 0 31 32 33 34 3 5 36 3 7 38 39 4 0 72 12bit a/d data (z1) (msb first) hi-z dout (ddly bit=1) 12bit a/d data (x) (msb first) hi-z 12bit a/d data (y) (msb first) 12bit a/d data (z2) (msb first) 12bit a/d data (z1) (msb first) ?l? s 0 1 0 1 1 1 r/w = ?1 ? d7 d0 comm and byte figure 13. a/d data read for sequential mode (seqm bit = ?000?) ms0954-e-05 2010/10 - 13 - [ak4185] 3. setup command (1) setup command write s csn sclk din 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 hi-z hi-z 0 1 0 addr r/w=?0? data dout d7 d0 d3 d0 ?l? command byte * din must keep low state between 13th sclk and 15th sclk after data is sent on the din. when the sclk is input over 16th sclk, din must keep low state. figure 14. setup command write (2) setup command read s csn sclk din 1 2 3 4 5 6 7 8 9 10 11 12 hi-z hi-z 0 1 0 addr r/w=?1? data dout d7 d0 d3 d0 ?l? command byte * din must keep low state between 9th sclk and 12th sclk after command is sent on the din. when the sclk is input over 13th sclk, din must keep low state. figure 15. setup command read ms0954-e-05 2010/10 - 14 - [ak4185] control command this command can select the touch panel and adc conversion clock. this 8bit control command includes channel selection, resolution, and power-down mode, and outputs in sy nchronization of the falling edge of sclk after csn = ?l?. the ak4185 latches the serial command at the rising edge of sclk. refer to the control command of the ak4185 as shown in table 4 . d7 d6 d5 d4 d3 d2 d1 d0 s a2 a1 a0 mode x1 x2 pd0 table 3. command byte definition (x1, x2: don?t care) bit name function d7 s start bit. this bit must be ?h? because the ak4185 initiates the command recognition. d6-d4 a2-a0 channel selection bit. analog inputs to the a/d converter, the activat ed driver switches, and the reference voltage are selected. d3 mode resolution of a/d converter. 0: 12bit output 1: 8bt output d2 x1 don?t care d1 x2 don?t care d0 pd0 power-down mode. (reference to ? ? power-down control ?) table 4. control command definition (1) 4-wire touch panel configuration channel selection status of driver switch adc input ( ' ain) reference voltage ( ' vref) a2 a1 a0 x-driver y-driver ain+ ain- vref+ vref- note ref. mode 0 0 0 off off temp0 vss vref vss temp0 ser 0 0 1 off on xp yn yp yn y-axis dfr 0 1 0 - - - - - - setup command ( table 7 ) - 0 1 1 xn-on yp-on xp xn yp xn z1 (pressure) dfr 1 0 0 xn-on yp-on yn xn yp xn z2 (pressure) dfr 1 0 1 on off yp xn xp xn x-axis dfr 1 1 0 off off in vss vref vss ain ser 1 1 1 off off temp1 vss vref vss temp1 ser table 5. control command list (4-wire) ms0954-e-05 2010/10 - 15 - [ak4185] (2) 5-wire touch panel configuration tr: vdd on/off, bl: vss on/off channel selection status of driver switch adc input ( ain) reference voltage ( vref) a2 a1 a0 tr-driver bl-dri ver ain+ ain- vref+ vref- note ref. mode 0 0 0 off off temp0 vss vref vss temp0 ser 0 0 1 on on wiper bl tr bl y-axis dfr 0 1 0 - - - - - - setup command ( table 7 ) - 0 1 1 - - - - - - reserved - 1 0 0 - - - - - - reserved - 1 0 1 on on wiper bl tr bl x-axis dfr 1 1 0 reserved - 1 1 1 off off temp1 vss vref vss temp1 ser table 6. control command list (5-wire) (the combination other than above is invalid.) (3) setup command configuration bit name description d7 s start bit. this bit must be ?h? because the ak4185 initiates the command recognition. d6-d4 a2-a0 setup command. must write ?010? d3-d1 addr addr selection ( table 8 ) ?000?: function 1 ( table 9 ) ?001?: function 2 ( table 10 ) ?010?: function 3 ( table 11 ) ?011?: function 4 ( table 12 ) ?111?: command of internal clock mode d0 r/w read/ write 0: write (when addr bits = ?111?, sequential mode is started.) 1: read (when addr bits = ?111?, a/d data is read out.) table 7. setup command description setup command function addr name d3 d2 d1 d0 00h function 1 panel continue count ddly 01h function 2 seqm[2:0] 0 02h function 3 interval[2:0] 0 03h function 4 sleep[1:0] seqst[1:0] 04h reserved 0 0 0 0 05h reserved 0 0 0 0 06h reserved 0 0 0 0 07h command x x x x note 9. do not write ?1? data to the bits named ?0?. table 8. setup command list (x: don?t care.) ms0954-e-05 2010/10 - 16 - [ak4185] function 1 [r/w]: external clock mode and internal clock mode bit name description d3 panel panel type selection. 0: 4-wire (default) 1: 5-wire d2 continue read mode selection. (only external clock mode) 0: single (default) 1: continuous d1 count adc conversion count. 0: 6 times ad conversion (default) 1: 10 times ad conversion d0 ddly a/d output data format 0: lsb justified. (default) 1: msb justified. table 9. setup function 1 description function 2 [r/w]: only internal clock mode bit name description d3-d1 seqm sequence mode 000: x y z1 z2 scan (only 4-wire touch screen) (default) 001: x y scan 010: x scan 011: y scan 100: z1 z2 scan (only 4-wire touch screen) 101: temp0 temp1 110: a-in (only 4-wire touch screen) 111: reserved d0 reserved table 10. setup function 2 description function 3 [r/w]: only internal clock mode bit name description d3-d1 interval sampling interval times. 000: 0 s (default) 001: 5 s 010: 10 s 011: 20 s 100: 50 s 101: 100 s 110: 200 s 111: 500 s d0 reserved table 11. setup function 3 description function 4 [r/w]: external clock mode and internal clock mode bit name description d3-d2 sleep sleep command (sleep m ode is valid after csn = ?h?.) 00: normal mode (default) 01: sleep mode 1 (penirqn disabled and output ?h?. touch panel is open.) 10: sleep mode 2 (penirqn disabled and open. touch panel is open.) 11: reserved d1-d0 seqst status bits [read only] 00: not busy 01: sampling wait 10: sequence busy 11: data available table 12. setup function 4 description ms0954-e-05 2010/10 - 17 - [ak4185] power on sequence the ak4185 has a power on reset circuit. when power up the ak4185, the power supply voltage must reach 80% vdd in less than 2ms after holding low state (under 0.1v) for 20 ms (min). to fix the internal register, send the control command when first power up. it initiates all registers such as pd0 bit and sequence register. the sequence is that 1) power on with csn= ?h? or ?l? then cs n = ?h?. 2) send control command after csn = ?l?. 3) csn = ?h? again. once sending command to fix the internal register after first power up, the state of the ak4185 is held on the same condition as last command issued. vdd cs n 2ms (max) 0.1v 80%vdd 50 ms 20ms (mi n) control command setup function1 setup function2 setup function3 setup function4 din figure 16. power on sequence power-down control power-down and pen interrupt function are controlled by pd0 bit. in order to achieve minimum current, it is recommended to set pd0 bit = ?0? for automatic power down of the a/d converter after a/d conversion. it is possible to reduce the variation in data by setting pd0 bit = ?1? during measurements. a/d converter keeps power up after every measurement complete. pd0 function 0 auto power-down mode a/d converter is automatically powered up at the start of the conversion, and powered down automatically at the end of the co nversion. the ak4185 is always powered down at this mode if csn = ?h?. all touch screen driver sw itches except yn or bl switch are turned off and relative pins are open state. only yn or bl driver switch is turned on and forced to vss in this case. pen interrupt function is enabled except when in the sampling time and conversion time. 1 adc on mode a/d converter is always powered up while csn = ?l?. if x-axis or y-axis is selected as analog input, touch screen driver switches are always turned on and the current flows through the touch plate if csn = ?l?. this is effective if more settling time is required to suppress the electrical bouncing of touch plate. if csn = ?h?, a/d converter is alwa ys powered down and touch screen driver switches are always off. (only yn or bl driver switch is turned on and forced to vss.) and while csn = ?h?, pen interrupt function is enabled. when csn st ate sets from ?h? to ?l?, the input channel and driver switches is set to the last setting. table 13. power-down control ms0954-e-05 2010/10 - 18 - [ak4185] sleep mode the ak4185 supports sleep mode that puts touch panel to open state and disables pen interrupt function, effective for reducing power consumption caused by unnecessary pen touch. the ak4185 changes to sleep mode when the micro-contro ller writes to sleep1-0 bits of ak4185?s register. after writing the sleep command, this sleep mode starts when the csn pin is ?h?. the ak4185 returns to normal operation out of sleep mode when the csn pin is ?l ? and receives the normal control command. csn = ?l? csn = ?h? sleep[1:0] penirqn touch panel penirqn touch panel 00 normal operation normal operatio n normal operation normal operation 01 normal operation normal operation disable (penirqn=h) open 10 normal operation normal operation disable (penirqn=hi-z) open 11 n/a n/a table 14. sleep mode ms0954-e-05 2010/10 - 19 - [ak4185] control sequence touch screen controller control sequence (external clock mode) in external clock mode, the ak4185 star ts a/d conversion, synchronizing with the external clock (dclk), and outputs the real data without calculating the average value, discarding the minimum and maximum values. (1) single mode (continue bit = ?0?) the timing of sampling and a/d conversion is shown in figure 17 and figure 18 . the ak4185 is controlled via 4-wire serial interface (csn, sclk, din, and dout pins). the dout pin changes to ?l? from hi-z state at the falling edge of csn. the ak4185 latches the 8bit control word serially via the din pin at the rising edge of sclk. the din pin must keep low state for minimum 7sclk times (9th-15th sclk) after command is sent on the din pin. as the ak4185 starts the command decoding at the first ?h? bit after csn = ? ?, msb (s bit) of the command must be ?h?. tracking time is the period from the falling edge of 5th sclk to the falling edge of 8th sclk. the sar a/d conversion is synchronized with sclk. the ak4185 outputs 12bit or 8bit a/d data with msb first via the dout pin from the falling edge of 9th sclk. the ak4185 can output one a/d data per 15 sclk cloc k cycles for the fastest way as shown in the dotted line. please see ? switching characteristics ? for the detail. x1 dout s a2 a0 a1 mo x2 pd0 x1 sclk din 11 9 8 7 6 5 4 3 2 1 0 10 csn 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 s a2 a0 a1 mo x2 pd0 11 hi-z 10 touch screen driver sw (internal node) (dfr mode, pd0 =?0?) figure 17. external clock mode control sequence (single12bit mode) dout s a2 a0 a1 mo x2 0 x1 sclk din 7 6 5 4 3 2 1 0 csn 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 s a2 a0 a1 mo x2 pd0 7 hi-z 6 touch screen driver sw (internal node) (dfr mode, pd0 =?0?) x1 figure 18. external clock mode control sequence (single 8bit mode) ms0954-e-05 2010/10 - 20 - [ak4185] (2) continuous mode (continue bit = ?1?) the timing of sampling and a/d conversion is shown in figure 19 and figure 20 . the dout pin changes to ?l? from hi-z state at the falling edge of csn. the ak4185 latches the 8bit control word serially via the din pin at the rising edge of sclk. tracking time is the period from the falling edge of the 5th sclk to the falling edge of the 8th sclk. the sar a/d conversion is synchronized with sclk from the falling edge of the 9th sclk. if ddly bit = ?0?, the ak4185 outputs 12bit a/d data with msb first from the falling edge of the 12th sclk. in this mode, the ak4185 continuously outputs a/d data according to the number of times by count bit (6 or 10 times a/d conversion) from the falling edge of the 8th sclk pe r 16sclk cycles. (12bit msb first, lsb justified) dout s a2 a0 a1 mo x2 pd0 x1 sclk din 11 9 8 7 6 5 4 3 2 1 0 10 csn 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 hi-z touch screen driver sw (internal node) (dfr mode, pd0 =?0?) 11 3 2 1 0 25 26 27 28 29 37 38 39 40 41 42 data 1 data 2 11 9 8 7 6 5 4 3 2 1 0 10 data n 16sclk 16sclk figure 19. external clock mode control sequence (continuous mode: ddly bit = ?0?) if ddly bit = ?1?, the ak4185 outputs msb first 12bit a/d data from the falling edge of the 9th sclk. in this mode, the ak4185 continuously outputs a/d data according to the number of times by count bit (6 or 10 times a/d conversion) from the falling edge of the 9th sclk per 16sclk cycles. (1 2bit msb first, msb justified) the a/d data output timing is the same as single mode. dout s a2 a0 a1 mo x2 pd0 x1 sclk din 11 9 8 7 6 5 4 3 2 1 0 10 csn 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 hi-z touch screen driver sw (internal node) (dfr mode, pd0 =?0?) 11 9 8 10 0 25 26 27 28 29 37 38 39 40 41 42 data 1 data 2 11 9 8 7 6 5 4 3 2 1 0 10 data n 16sclk 16sclk figure 20. external clock mode control sequence (continuous mode: ddly bit = ?1?) if pd0 bit sets to ?1? in continuous mode, a/d converter is powered up between a/d conversions. it helps a/d data variation to decrease. in continuous mode, when the ak4185 is executing the operation, the ak4185 ignores all control commands. the ak4185 can receive the next control command from the rising edge of the 96th sclk (count bit = ?0?) or the 160th sclk (count bit = ?1?). when the next control command is sent at the rising edge of the 97th sclk (count bit = ?0?) or the 161st sclk (count bit = ?1?), the ak4185 can output one a/d data per 16 sclk clock cycles as well as the continuous mode. ms0954-e-05 2010/10 - 21 - [ak4185] touch screen controller control sequence (internal clock mode) in internal clock mode, the ak4185 starts a/d conversion, synchronizing with the internal clock (osclk). the ak4185 calculates the average value, discar ding the minimum and maximum values by a median averaging filter , and outputs the results. when the micro-processor sends the sequence start command (10101110b), the ak4185 starts the internal clock mode. the ak4185 sets the penirqn pin to ?l ? and automatically powers up the internal oscillator. then the ak4185 executes the sequence that selected by se qm2-0 bits one by one. when the sequ ence is finished, the ak4185 sets the penirqn pin to ?h? and notifies th at sequence is ended. after 2.8 s (typ.) is passed from the rising edge of the penirqn pin, the internal oscillator is powered down and pen interrupt function is enabled. the micro-controller can confirm that the a/d conversion data is available by checking the penirqn pin or reading the status register (seqst1-0 bits). the micro-processor sends the read command (10101111b) to read the a/d conversion data. then the ak4185 outputs the a/d data in order of the register selected by seqm1-0 bits. when the micro-processor reads data as many as more than the actual data number, the ak4185 outputs a zero data. the a/d data is cleared after reading all the a/d data. must read the a/d conversion data after confirming the pe nirqn pin turns to ?h? or a register status seqst1-0 = ?11?(data available). do not read the a/d conversion data when the data is not available. pen touch count end? sequence start start clock set penirqn low driver set wait time r stop clock & pentouch enable done no yes adc sequence end? no yes set penirqn high figure 21. internal clock mode control flowchart ms0954-e-05 2010/10 - 22 - [ak4185] internal sequence (seqm2-0 bits=?001?, x - y scan ) hi-z sequent ial mode penirqn s w csn sclk din dout osclk tracking, conversion (x-axis 2nd) 20 osclk tracking, conversion (x-axis 1st) 20 osclk pen touch wait 20 osclk tracking, conversion (x-axis nth) 20 osclk tracking, conversion (y-axi s 1st) 20 osclk tracking, conversion (y-axis nth) wait s=1 w=0 = ?010111? data available penirqn enable 2.8us figure 22. internal clock mode control sequence (x-y scan: seqm bits = ?001?) (sequence mode start internal sequence processing data available) hi-z sequential mode x-axis 12bit a/d-data penirqn s r csn sclk din dout ( ddly bit=0 ) 16 sclk 16 sclk data available s=1 r=1 = ?010111? 0 0 0 0 dout ( ddly bit=1 ) y-axis 12bit a/d-data 0 0 0 0 hi-z x-axis 12bit a/d -data 0 0 0 0 0 0 0 0 y-axis 12bit a/d-data 2.8us (typ) figure 23. internal clock mode control sequence (x-y scan: seqm bits = ?001?) (data available a/d data read) the ak4185 can only accept the register read and control commands of a2-0, mode and pd0 bits for the external clock mode, during executing this sequence. the other commands are ignored. the micro-processor can set csn = ?h? during the sequence. however, the ak4185 can accept sequen ce commands even if the ak4185 is in the sleep mode. when the sleep mode is selected, the ak4185 goes to the sl eep mode after the sequence is finished and csn = ?h?. ms0954-e-05 2010/10 - 23 - [ak4185] pen interrupt the ak4185 has pen interrupt function to detect the pen touch. pen interrupt function is enabled at power-down state. the yn pin (4-wire) or bl pin (5-wire) is connected to vss at the pen interrupt enabled state. and the xp pin (4-wire) or wiper pin (5-wire) is pulled up via an internal resistor (r irq : typ.50k ? ). penirqn is connected the xp pin (4-wire) or wiper pin (5-wire) inside. if touch plate is pressed by a pen, the current flows via [ak4185] xp/wiper penirqn driver on yn/bl en2 r irq = 50k driver off en1 vdd vdd vdd figure 24. penirqn functional block diagram (wiper does not have a driver.) dout s a2 a0 a1 mo x2 pd0 x1 sclk din 11 9 8 7 6 5 4 3 2 1 0 10 csn 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 conv internal i ii ii i figure 25. penirqn functional timing chart ms0954-e-05 2010/10 - 25 - [ak4185] system design figure 26 , figure 27 shows the system connection diagram for the ak4185. the evaluation board [AKD4185] demonstrates the optimum layout, power supply arrangements and measurement results. <4-wire touch screen input> top vie w csn analog supply 1.6 3.6v 0.01 * p sclk dout penirqn in yn xn yp xp vss din vdd + 10 0.1 4-wire touch screen auxiliary analog input 0.01 * 0.01 * 0.01 * a nalog ground digital ground figure 26. typical connection diagram notes: - vss of the ak4185 should be distributed separately from the ground of external controllers. - all digital input pins (csn, sclk, din pins) must not be left floating. - the dout pin is floating except when communicating w ith the micro-controller. therefore, a pull-up or pull-down resistor around 100k must be connected to the dout pin of the ak4185. ms0954-e-05 2010/10 - 26 - [ak4185] <5-wire touch screen input> top vie w csn analog supply 1.6 3.6v 0.01 * p sclk dout penirqn wiper bl tl tr br vss din vdd + 10 0.1 5-wire touc h sc reen 0.01 * 0.01 * 0.01 * a nalog ground digital ground 0.01 * figure 27. typical connection diagram notes: - vss of the ak4185 should be distributed separately from the ground of external controllers. - all digital input pins (csn, sclk, din pins) must not be left floating. - the dout pin is floating except when communicating w ith the micro-controller. therefore, a pull-up or pull-down resistor around 100k must be connected to the dout pin of the ak4185. 1. grounding and power supply decoupling the ak4185 requires careful attention to power supply and grounding arrangements. vdd is usually supplied from the system?s analog supply. vss of the ak4185 must be connected to the analog ground plane. system analog ground and digital ground should be connected together near to wher e the supplies are brought onto the printed circuit board. decoupling capacitors should be as near to the ak4185 as possible, with the small value ceramic capacitor being the nearest. 2. analog inputs when an emi source is close to the touch panel analog sign al line, emi noise affects an alog characteristics performance. connect noise canceling capacitors as close as possible to e ach pin (xp, xn, yp, yn pins) of the ak4185 to avoid this noise. ( figure 26 , figure 27 ) ms0954-e-05 2010/10 - 27 - [ak4185] package 12pin csp: 1.96mm x 1.46mm 0.5 0.3 0.05 0.08 s s 0.05 ab s b m a 0.65 0.05 0.25 0.0 5 dcba 1.46 0.05 1 2 3 a b c d top view bottom view 1.96 0.05 1 2 3 4185 xxxx material & lead finish package molding compound: epoxy resin, halogen (bromine and chlorine) free solder ball material: snagcu ms0954-e-05 2010/10 - 28 - [ak4185] marking a1 4185 x x xx xxxx: date code identifier (4 digit) pin #a1 indication ms0954-e-05 2010/10 - 29 - [ak4185] revision history date (yy/mm/dd) revision reason page contents 08/05/09 00 first edition 12, 13, 14 digital i/f figure 8~15 was added. 18 power on sequence description for power on reset was added. figure 16 was added. 10/01/25 01 description addition 1, 20, 22 description for integrated median averaging filter was added. 10/04/22 02 specification addition 5 analog characteristics touch panel drivers switch on-resistance were added: 2.5 ? (min), 15 ? (max) 10/05/31 03 specification addition 5 analog characteristics penirq pull up resistor (r irq ) were added: 30k ? (min), 70k ? (max) description addition 5 analog characteristics load condition for the touch panel drivers switch on-resistance was added: r l =300 ? 10/10/01 04 specification change 5 dc characteristics tri-state leakage current was changed. max: 10 a 3 a min: -10 a -3 a 10/10/19 05 description addition 28 package height tolerance was added. important notice z these products and their specifications are subject to change without notice. when you consider any use or application of these products, please ma ke inquiries the sales office of asah i kasei microdevices corporation (akm) or authorized distributors as to current status of the products. z descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products. you are fully responsible for the incorporatio n of these external circuits, applicati on circuits, software and other related information in the design of your equipments. akm assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein . akm assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. z any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z akm products are neither intended nor auth orized for use as critical components note1) in any safety, life support, or other hazard related device or system note2) , and akm assumes no responsibility for such use, except for the use approved with the express written consent by representative director of akm. as used here: note1) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in wh ich its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z it is the responsibility of the buyer or distributor of akm products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification. ms0954-e-05 2010/10 - 30 - |
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